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parity checking
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An error detection technique that tests the integrity of digital data in memory or on disk. Parity checking adds an extra parity cell to each byte of memory and an extra parity bit to each byte transmitted. The value of the ninth bit (0 or 1) depends on the pattern of the byte's eight bits. Each time a byte is transferred or transmitted, the parity bit is tested by circuits on the motherboard.

Only One Bit Errors
"Even parity" systems make the parity bit 1 when an even number of 1 bits are in the byte; "odd parity" makes it 1 for an odd number of 1s. However, parity checking cannot detect two bits in error in the same byte, because the parity would still be correct for that binary sequence. Error-correcting code (ECC) is a more robust memory checking system (see ECC memory).

Lots of No Parity in the World
There are 12% more memory cells in 9-bit parity chips than there are in 8-bit non-parity memory. To shave costs, many computers are built with non-parity memory, and it is truly a miracle that the memories in the billions of non-parity computers in the world work as well as they do. See RAID and ECC memory.



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