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Stack 'Em Up: IBM Demos New Way to Cool Chips


By Michele Masterson, ChannelWeb

12:38 PM EDT Fri. Jun. 06, 2008
Now that's a cool idea. IBM demonstrated a prototype that shows how rivers of water can cool computer chips that have circuits and components stacked on top of each other instead of the traditional method of having them sit side-by-side on silicon wafer.

"As we package chips on top of each other to significantly speed a processor's capability to process data, we have found that conventional coolers attached to the back of a chip don't scale," said Thomas Brunschwiler, project leader at IBM's Zurich Research Laboratory, in a statement. "Until now, nobody has demonstrated viable solutions to this problem."

Brunschwiler and other IBM researchers piped water into cooling structures as thin as a human hair (50 microns) between the individual chip layers to remove heat efficiently at the source. The 3-D chip stacks would have an aggregated heat dissipation of close to 1 kilowatt -- 10 times greater than the heat generated by a hot plate -- with an area of 4 square centimeters and a thickness of about 1 millimeter.

The researchers said they were able to overcome technical challenges by designing a system that maximizes the water flow through the layers, and also hermetically sealed the interconnects to prevent water from causing electrical shorts.

Brunschwiler and researchers are now working to optimize cooling systems for even smaller chip dimensions and more interconnects. In addition, they are also investigating additional sophisticated structures for hotspot cooling.

The research was conducted in IBM labs in Zurich, Switzerland in collaboration with The Fraunhofer Institute based in Berlin.

"This truly constitutes a breakthrough," said Bruno Michel, manager of the chip cooling research at the IBM Zurich Lab, in a statement. "With classic backside cooling, the stacking of two or more high-power density logic layers would be impossible."

This recent development follows last year's demonstration by the company in furthering chip-stacking technology in a manufacturing environment. The research showed that the technology was able to shorten the distance information on a chip needs to travel by 1,000 times, and allow the addition of up to 100 times more channels, or pathways, for that information to flow compared to 2-D chips.

 
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