System Builders Explore Ways To Boost Opteron Horsepower In Blades

The system builders, who spoke on the condition that they remain anonymous, said they are evaluating two-socket blades that couple a programmable coprocessor with AMD's Opteron CPU.

"We are talking about ultra-high floating point for high-performance computing," said a sales executive at one system builder. The executive noted that a coprocessor setup is the kind of deep customization work that can differentiate a system builder's business from those of top-tier OEMs.

Executives at AMD, Sunnyvale, Calif., declined to comment but confirmed that companies are looking at matching up coprocessors with Opteron CPUs and that AMD has been encouraging such experimentation.

An AMD spokeswoman said the company expects to show off some of the technology at a briefing scheduled for June 1.

The Opteron, considered a fast and power-efficient CPU option, has gained substantial traction in the HPC market, according to solution providers. A blade is the preferred infrastructure for the coprocessor bundles because it packs best power/performance ratio in the smallest amount of space, they said.

"This is the cold power year," said one large system builder who is testing the option. "Everything is about efficiency."

This system builder said testing is under way but noted that commitments to productize the technology have yet to be made. He said the current testing is checking the option’s viability for the HPC space, which includes segments such as entertainment render farms, gas and oil exploration, biological applications and financial modeling.

Doug O'Flaherty, division manager of acceleration strategy at AMD’s Advanced Technology Group, said innovations such as pairing an Opteron with a coprocessor have come out thanks to the HyperTransport technology in AMD processors.

HyperTransport is a high-speed link between an AMD CPU and a system's I/O, such as the PCI bus, hard-drive controller and optical drives. Opteron processors contain three HyperTransport links, but only two are used in two-way systems. One connects the I/O and the other connects the processor to the second socket. The third link was originally designed to connect processors in four- and eight-way systems. HyperTransport is an open standard, and two companies--PathScale, Sunnyvale, and iWill, Irvine, Calif.--have developed an HTX connector to take advantage of the third HyperTransport link. For that slot, PathScale markets the Infiniband card that’s used for low-latency network connections in server clusters.

That was back in 2004. Today, O'Flaherty said, other companies are looking at new ways to use the HyperTransport links, either by using the HTX connector or plugging directly into an open processor socket. O'Flaherty, who has been working on Opterons and HPC at AMD for several years, said he moved into his current role in January to help drive such innovation forward.

System builders testing the coprocessor bundle said they’re not using the third connector but are simply plugging a co-processor into the second socket in a two-socket blade.

Last month, two coprocessor manufacturers announced models that will plug into an Opteron socket. Both offer Field-Programmable Gate Arrays (FPGA), which essentially are logical chips that can be programmed to perform a specific function. One system builder briefed on the technology said a likely scenario for chips calls for customers to do the intricate programming to accelerate a particular application and the system builder to focus on customizing the hardware.

Start-up XtremeData, Schaumburg, Ill., showcased the XD1000 programmable coprocessor at the Embedded Systems Conference in San Jose, Calif., in April. At the same event, competitor DRC, Santa Clara, Calif., announced a development system with programming tools to help configure its own FPGA.

O'Flaherty said AMD also is looking beyond servers for the technology. Physics engines in computer games are becoming sophisticated enough that they could eventually warrant a specific processor for the enthusiast market, he said, adding that he wouldn’t rule out the potential for a future dual-socket gaming system with a coprocessor dedicated to accelerate game physics.