Applications & OS News
AMD To Launch 45nm Chips Ahead Of Schedule
Advanced Micro Devices on Tuesday confirmed that its first 45-nanometer processors are in production and will be on shelves before the end of the year. The Sunnyvale, Calif.-based chip maker will first roll out 45nm, 75-watt server parts, code named Shanghai, and follow up with 55W and 105W chips in the first quarter of 2009, said AMD's new Server and Workstation Division GM Pat Patla.
Patla recently replaced former server chief Randy Allen, who was promoted in May to head up AMD's Computing Solutions Group in a major executive reshuffle that presaged Dirk Meyer's replacement of Hector Ruiz as CEO in July.
AMD's quad-core Shanghai processors are achieving 35 percent increases in both power efficiency and performance in clock-for-clock competition over the chip maker's current 65nm generation of quad-core server chips formerly code named Barcelona, Patla said in a press briefing held Tuesday in San Francisco.
The server chief said AMD had reviewed its engineering processes ahead of the Shanghai validation process in an effort to avoid silicon glitches like the TLB errata that slowed the ramp of its Barcelona and Phenom chips in the first half of 2008.
"Picking up from Barcelona's launch, internally, starting back in January, we really took a look from an engineering perspective at how do we learn from the Barcelona missteps and really instill confidence in Shanghai, our 45nm product," Patla said.
"AMD grew really quickly over the last couple of years and so did the complexities of our products, so we had to make sure our processes were scaling with the products we were bringing to market."
The chip maker slowed down the initial tape-outs of Shanghai silicon and spent more time on testing and the validation process for the chips, he said. But by working on validation with Tier 1 OEM partners, AMD was actually able to move up its shipment schedule from Q1 of 2009 to Q4 of 2008 for its first 45nm processors, Patla added.
AMD's main rival, microprocessor market leader Intel of Santa Clara, Calif., began shipping its first 45nm parts in the second half of 2007. Intel's next fabrication process shift will be to 32nm, with production scheduled for late 2009 or early 2010. The chip leader is also planning its own major product ramp around its new Core i7, or Nehalem microarchitecture in roughly the same timeframe as AMD's Shanghai roll-out.
Next: More Roadmap News From AMD
Patla would not reveal speeds or prices for the forthcoming Shanghai chips, all quad-core, ACP (average CPU power) devices with 6MB of cache, or double the cache on Barcelona. He said those first 45nm products would be general-purpose server chips in the 75W thermal envelope that are socket-compatible with platforms for the current Barcelona generation of quad-cores. Those processors are currently in production at AMD's Fab 36 in Dresden, Germany and the chip maker's OEM partners are expected to have Shanghai-based servers available before the end of the year, he said.
Early next year, AMD will begin shipping 55W HE (highly efficient) Shanghai processors for the blade and cloud computing spaces, and 105W SE (special edition) chips for raw performance purposes, Patla said.
He said Shanghai's 35 percent average performance boosts over Barcelona are in large part due to the introduction of AMD's HyperTransport 3.0 technology, as well as instructions-per-cycle enhancements that result in an average performance improvement of 20 percent in clock-for-clock competition between the newer and older quads.
Patla also spoke briefly about AMD's roadmap for the second half of 2009 and beyond. The chip maker will produce its first server chipset since ending that business with its AMD-8111 chipset in 2004. Nvidia and Broadcom are currently the sole producers of server chipsets for AMD's Opteron products.
The new chipset, code named Fiorano, is due out in the second half of next year. It will remain a Socket F (1207), DDR2 product, with support for both Shanghai and a six-core server chip called Istanbul that is scheduled for production in the latter half of 2009.
In 2010, AMD will make the move to DDR3 memory with a new chipset, Maranello, and a new socket, G34, to go with server chips code named Magny-Cours and Sao Paulo. Magny-Cours will be a 12-core processor, while Sao Paulo will be an upgrade to the six-core line that will be introduced as Istanbul in 2009, according to AMD.