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Intel's Gelsinger Sees Clear Path To 10nm Chips

Digital Enterprise Group honcho also predicts massive fab consolidation in move to 450mm wafers during talk ahead of Intel's 40th anniversary celebration on July 18.

Intel sees a "clear way" to manufacturing chips under 10 nanometers and when the semiconductor industry transitions to 450mm silicon wafers around 2012, the number of companies that run their own fabs will drop into the single digits. Those were just the first of a series of predictions Intel's Pat Gelsinger rattled off for media gathered in San Francisco Monday in a preview of celebrations surrounding the chip giant's 40th anniversary next month.

Intel marks its founding July 18, commemorating the date in 1968 when Fairchild Semiconductor physicists Robert Noyce and Gordon Moore struck out on their own to found Integrated Electronics, Intel for short.

Gelsinger, currently VP of Intel's Digital Enterprise Group, also served as the Santa Clara, Calif.-based chip maker's first CTO and was chief architect on the 386 or IA-32 instruction set architecture, which debuted in the Intel 80386 central processor in 1985. Following a few personal reflections about his own participation in Intel's rich corporate history, particularly his dealings with Intel employee No. 3 and onetime CEO Andy Grove, Gelsinger offered four predictions for the semiconductor industry in the months and years to come.

Speaking about Intel co-founder Gordon Moore's eponymous "law" regarding the expected doubling of transistors per integrated circuit every two years, Gelsinger noted that there was a time when he and his Intel colleagues wondered if they'd ever be able to scale chips below 100 nanometers.

"But we did do that, and today we see a clear way to get to under 10 nanometers. With Moore's Law we always have about 10 years of visibility into the future, so beyond 10 nanometers, we're not sure how we'll do it," he said.

Intel debuted its 45nm process late last year and has been ramping its Penryn line of 45nm processors steadily throughout this year. The next die shrink milestone will be the 32nm process, set to kick off next year, followed by 14nm a few years after that and then sub-10nm, if all goes according to plan.

Gelsinger described the elemental hoops Intel has had to jump through to achieve each "tick" milestone in the chip maker's relentless pursuit of Moore's Law, noting that while each new process adds materials used in novel ways, modern processors are still built on a "silicon scaffolding."

"We are putting more and more of the periodic table onto that silicon scaffolding. Today we use about half of the elements on the periodic table. When and#91;Intel co-founder Robertand#93; Noyce and Moore started, they used six elements," Gelsinger said.

"We replaced the gate with high-K, we put metal on top of it, but it's still, quote, silicon. and#91;The process of getting smallerand#93; keeps moving forward. It may be carbon nanotubes next or it may be spintronics. But we'll keep moving forward."

Next: Squeezing Out Smaller Fabs


Gelsinger also predicted further consolidation in the semiconductor industry as the expensive conversion of fabrication plants from the current generation of 300mm silicon wafers to 450mm forces out smaller fab owners, whom he declined to name outright despite prodding by reporters.

"With each new generation in silicon technology, we see fewer and fewer companies that run their own fabs," he said, adding that Intel, Samsung and the Taiwan Semiconductor Manufacturing Company (TSMC) -- the three biggest purchasers of semiconductor equipment in the world -- have agreed to the 450mm transition "post-2010, pre-2015."

"We used to have hundreds of companies that built fabs, now we have tens of companies that build fabs. We'll see single numbers by the time we move to 450mm," Gelsinger said, predicting that "any company below $1 billion is not big enough to do this next big transition, and they are falling off the pace of Moore's Law."

Gelsinger's remaining predictions were more abstract in nature. He said that better parallel programming for current multi-core processors and future ones would lead to "terascale computing at the level of everyone's personal computer." Intel's and others' work in simplifying tool kits for software developers to take advantage of multi-threading on multi-core processors would pay off for certain classes of workloads such as visual computing, he said.

One payoff end-users should expect fairly soon is "a dramatic restructuring of the user interface" that is immersive, intuitive and interactive. Asked whether he expected Microsoft, Apple or somebody like to Nintendo to drive that evolution of the interface, Gelsinger again demurred, saying, "In Intel's history, we've never been good at picking the next user interface or killer app."

Gelsinger wrapped up with a statement about what he called "the continued scaling of compatibility" -- basically the idea that Intel wants to get x86 chips into everything from consumer electronics devices to embedded systems -- and his own vision of a world where everyone on the planet is connected to a computer and the Internet 24 hours a day, seven days a week.

That last prediction might take a bit more time to happen than the others, he admitted.

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