Intel To Detail Eight-Core Xeon At ISSCC


The Santa Clara, Calif.-based chip giant will present 15 papers, the most of any ISSCC presenter, at the Feb. 8-12 event, as well as guide a special plenary session to discuss what Intel believes is the onset of the system-on-a-chip (SoC) era in semiconductor manufacturing.

Intel senior fellow Mark Bohr, speaking on a pre-ISSCC briefing Wednesday, was stingy with the details about the eight-core, 16-thread enterprise Xeon processor, code-named Nehalem EX. But as the code-name implies, it's a product of Intel's new Nehalem microarchitecture, first seen last November in the form of three 45nm desktop chips branded Core i7.

The Nehalem EX has 2.3 billion transistors and boasts an interconnect bit rate of up to 6.4 gigatransfers-per-second -- a measurement Intel is suddenly concerned with now that it's integrated the memory controller, power-management microcontroller and power-gate transistors on its Nehalem-class processors. The octal-core chip comes on the heels of three, six-core Xeons released last fall, and Nehalem EX should be released sometime in the second half of 2009, though you didn't hear that from Intel.

Other papers that Intel will present at ISSCC include presentations on the upcoming, though recently delayed, quad-core Itanium processor, code-named Tukwila, Intel's thoughts on improving graphics processing for small mobile devices, and the development of die-wide remote temperature sensors for the chip maker's upcoming 32nm, multicore chips.

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