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MIPS Prepares 64-Bit Prodigy CPU Core Architecture

Due in the fall, the multicore, multithreaded CPU architecture from MIPS Technologies is intended for the networking and mobile markets as well as the digital home -- where MIPS is strongest currently.

Semiconductor firm MIPS Technologies this week said it is preparing an upcoming off-the-shelf 64-bit microprocessor core to go with the 64-bit CPU architecture it currently licenses out to semiconductor manufacturers. The company, whose key products include DTVs, set-top boxes, Blu-ray players, Wi-FI routers and other devices in the digital home segment will launch its latest 64-bit cores, code-named Prodigy, this Fall.

MIPS has licensed its 64-bit MIPS64 core architecture to companies including Cavium and Netlogic for years and even introduced the industry’s first 64-bit CPU, the R4000, in 1991. Now MIPS says it has incorporated multithreading and multiprocessing technologies in an off-the-shelf 64-bit Prodigy core. The company says it will offer the 64-bit cores as an IT block -- with both a single-core and a multi-core version targeted toward the networking, mobile and digital home markets –- and will formally offer details in September or October of this year.

In an interview with CRN on Monday, Art Swift, vice president of Marketing and Business Development at MIPS, and Gideon Intrater, vice president of Product Marketing and Applications at MIPS, discussed the benefits of Prodigy and of MIPS’ business model in general.

Swift said MIPS’s Prodigy is the world’s first licensable 64-bit, multithreaded, multicore processor. ’MIPS is one of the leading IP suppliers to semiconductor vendors, with industry standard processors and cores,’ Swift said. ’MIPS’ new processor is licensable to semiconductor companies who then build their SOCs around it. We are delivering higher performance for the applications our customers are building, which is one of most important things at the end of the day.’

Intrater said MIPS’ plans for Prodigy are very similar to what Intel does with its microprocessors, except for certain specific features in addition to the physical microprocessor such as lightweight multithreading, improved quality of service and inter-thread communication. MIPS said it also allows easier thread management through a user-configurable thread scheduler and efficient inter-thread communication, a virtual Processing Element in addition to hardware threads, as well as the elimination of overhead interruption between execution threads. ’Prodigy is a ground-breaking new core from MIPS,’ Swift said, ’It’s the only licensable 64-BIT multi-threading multi-core processor out there.’

Part of the need for Prodigy, Intrater said, is the result of software systems becoming increasingly complex. ’Customers need Java-based applications like those found in Android products in order to reach higher data rates,’ Intrater said. ’Systems need to address much larger memory sub-systems. We see the need to deliver this high-performance in the most optimal space and power possible.’

Next: MIPS To Meet The Needs Of Mobile Devices

In addition to higher data-rates and Java-based applications, MIPS said the need for deeper packet inspection in the networking market and the need to manage higher data-rate baseband modems in the mobile market create demand for larger memory footprint and better performance.

’Portable applications need to live longer with the same battery,’ Intrater said. ’If it’s tattered, you have to deal with total power consumption with fans and other ways to deal with power. Instead this chip builds in significantly higher performance and lower footprint in terms of area and power.’

MIPS said in order to meet tight power constraints, CPU cores ought to add more execution pipelines within a single CPU. In order to eliminate the vacant spots or ’bubbles’ multiple in-line execution creates, Intrater said out-of-order dispatching can be effective, but not without sacrificing much power and space. ’There are ways to handle that, but really today speculative execution is consuming a lot of power and area’ he said, ’the right approach to getting more effective pipelines is multi-threading.’

Nor can speed of execution make up for the benefits of multicore processing, according to Intrater. ’The high-speed game doesn’t work anymore,’ he said. ’Intel was pushing it too high in the past. The solution is to go parallel either through multicore processing or parallel execution units delivering more through-put per every clock cycle.’

In the Prodigy cores, Intrater said, each thread is like a task with instructions coming from completely different threads with no dependencies between them and, therefore, very high utilization of the pipeline with practically no bubbles. This in turn, according to Intrater, eliminates the need for expensive out-of-order execution techniques or speculative execution techniques. ’With MIPS from Prodigy you can have your cake and eat it too,’ Intrater said. ’You can add an extra execution or two or three – as many as you want. Without adding pipeline length or speculative execution, you get a machine that is more efficient than existing microprocessors.’

MIPS said it currently offers two multi-threaded processors, the single-core MIPS32 34 K processor and the multicore MIPS32 1004K coherent processing system (CPS). The company has over 35 multi-threaded product licenses and 33 percent of its midrange to high-end cores are based on a multithreaded core, according to MIPS.

Intrater said PMC Sierra and Mobileye are both semiconductor vendors that can run their applications on parallel, multi-threaded CPUs from MIPS, and that Mobileye has already claimed to get 6x the performance from MIPS’ solution compared to MIPS’ competitor’s cores. ’We hope that these customers will engage with us with this product,’ Intrater said.

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