Intel's New High-Performance Coprocessors Coming To Supercomputers Next Year

Intel's second-generation Xeon Phi coprocessors will be available in supercomputers in 2016, Intel revealed Monday, as the company aims to expand high-performance computing capabilities and lower the barriers to adoption.

The 14nm coprocessors, code-named Knights Landing, aim to squeeze more performance out of supercomputers while maintaining a unified environment. Intel said the new coprocessors will set new standards for programming ease working with the synergy between CPUs and accelerator cards.

"We're entering a new era in which supercomputing is being transformed from a tool for a specific problem to a general tool for many," said Charlie Wuischpard, vice president and general manager of HPC Platform Group at Santa Clara, Calif.-based Intel, in a release. "System-level innovations in processing, memory, software and fabric technologies are enabling system capabilities to be designed and optimized for different usages, from traditional [high performance computing] to the emerging world of big data analytics and everything in between."

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Knights Landing, which has 72 individual cores manufactured on the company's 14nm Tri-Gate Transistor process, represents an overhaul from Intel's current 22nm 61-core Xeon Phi version, dubbed Knights Corner.

Unlike Knights Corner, which is used with Xeon E5 server processors, Intel's new coprocessor will also work as a host processor, with capabilities of running an operating system and applications on its own.

Knights Landing contains 16 GB of on-package MCDRAM memory, which means that modules are stacked through a wire, making memory offer five times more bandwidth than DDR4 memory. According to Intel, the coprocessor can deliver over 3 teraflops of peak performance, and is designed for highly paralleled computing.

The coprocessors are also the first Xeon Phi family products to divert from the original 32-bit Pentium microarchitecture, and are offered in both a socketed version and a PCI-E version.

"Up until now, Intel's Xeon Phi processors were trickier -- they were an add-on card going into the station -- and because of that, they were specialized and researchers had to write code specifically for them," said Jon Bach, president of Puget Systems, a Kent, Wash.-based Intel system builder partner. "Knights Landing goes back to being a more traditional processor, making it easier to utilize."

According to Intel, the processors are now shipping to Intel's first customers and preproduction systems for demonstrating that supercomputer designs are running. The chip company is also ramping up the coprocessor sales in the first quarter of 2016, and expects 50 systems providers to drive Intel Xeon Phi product family-based systems in the market at launch.

Intel also launched on Monday its Omni-Path Architecture, a new HPC-optimized fabric technology that the company said makes the performance of HPC clusters more accessible to a broader variety of users.

Knights Landing and Intel's Omni-Path Architecture are part of the company's System Scalable Framework (SSF) ecosystem, which is an advanced architectural approach to enable more scalable, flexible and balanced HPC systems.

Intel said the new scalable system framework -- which arrives as the HPC industry faces increasing changes and challenges, such as divergent infrastructures among visualization, big data, machine learning and HPC -- aims to advance the accessibility of HPC to more industries and workloads such as data-driven analytics, visualization and machine learning.