Xilinx Makes Composable, Easy-To-Code SmartNIC With Alveo SN1000
Xilinx, which is being acquired by AMD for $35 billion, has revealed the Alveo SN1000, the ‘industry’s first’ composable SmartNIC. ‘We’re providing an application-specific acceleration pipeline, where our customers can say, ‘I want this level of performance for storage or security or network acceleration,’ a Xilinx rep says.
Ahead of the company’s $35 billion sale to AMD, Xilinx is doubling down on its data center strategy with new products and solutions that include what it says is the “industry’s first” composable SmartNIC that can accelerate a variety of storage, network and security workloads typically handled by the CPU.
The Santa Clara, Calif.-based chipmaker said on Tuesday that the new FPGA-based, 100-gigabit Alveo SN1000 SmartNIC will bring software-defined hardware acceleration to CPU-offload functions, an easy programming interface and the ability to create or tweak network functions, preventing the need to replace hardware for fast-changing data center environments.
The introduction of Xilinx’s new SmarNIC is arriving as Intel, Nvidia and other companies are making big moves in the space, providing new functionality and CPU offload capabilities in the data center that go beyond traditional network interface cards. AMD CEO Lisa Su told CRN last year that she sees SmartNICs as a “great opportunity” with her company’s plan to close on its Xilinx acquisition in late 2021.
Pej Roshan, vice president of marketing at Xilinx, told CRN that SmartNICs represent a major opportunity for solution providers in the data center because applications are rapidly evolving and data center operators are switching out different application types at a daily or weekly rate. This, he said, has created a need for the ability to disaggregate the data center into independent compute, network and storage resources that can be configured and rearranged with ease.
“These are just elements that you can grab, pick and choose from and use based off of the applications’ immediate needs,” he said.
SmartNICs are becoming an important part of this new composable data center architecture, according to Roshan, because the network is becoming the new center of gravity, enabling these independent resources to be pooled in different configurations across multiple servers.
“The hub of the data center is now Ethernet. This is what’s connecting all of these disparate and fungible services together,” he said. “And so, by extension, if Ethernet is now that fabric, the hub of the data center is the NIC. That is the big pivot. That is the big story that’s evolving in the data center.”
Kartik Srinivasan, networking and storage business lead at Xilinx, said one of the biggest benefits of FPGA-based SmartNICs like the Alveo SN1000 is that partners can program them to suit a variety of compute, storage and network needs. The Alveo SN1000 comes pre-loaded with acceleration modules in the data path, Srinivasan said, for an “out-of-the-box” experience, or they can program their own modules using Xilinx’s Vitis Networking platform, which supports P4, C and C++ coding languages.
“We’re providing an application-specific acceleration pipeline, where our customers can say, ‘I want this level of performance for storage or security or network acceleration,’” he said.
Based on Xilinx’s 16-nanometer UltraScale+ architecture, the Alveo SN1000 is a full-length, half-length PCIe 4.0 card that comes with a low-latency Xilinx XCU26 FPGA, a 16-core Arm processor, dual-QSFP ports for 10/25/100 GB/s connectivity and a 75-watt power envelope.
“We’re not trying to squeeze the CPU cores so that the problem just goes to a different place,” Srinivasan said. “We’re actually providing hardware acceleration and enabling our customers to orchestrate and manage it using software.”